This invention relates to a field emission device and its integration into an addressable array. Applications are in areas in which a plurality of small cathodes are used as cold electron emission sources such as in field emitter displays (FEDs), electron amplifiers, sensors, electron injection devices, and others.
Most cold electron source arrays consist of conical-shaped conductors or semiconductors that are surrounded by small gates with typical diameters ranging from 0.5 to 1.5 .mu.m. Metallic cone emitters are disclosed, for example, by C. Spindt in U.S. Pat. No. 3,665,241, and semiconductive cone emitters are described, for example by H. Busta in U.S. Pat. No. 5,227,699, entitled "Recessed Gate Field Emission", issued Jul. 13, 1993. See generally:
(1) Presentations by Silicon Video Corporation, Micron Display Corporation and FED Corporation at the ARPA High Definition Systems Information Conference, Arlington, Va., Apr. 30-May 3, 1995. PA1 (2) J. Levine, "Field Emission Displays," American Vacuum Society Test Panel Display Processing and Research Tutorial, Jun. 21, San Jose, Calif. 1995. PA1 (3) J. P. Spallas et al., "Field Emitter Array Patterning for Large Scale Flat Panel Displays Using Laser Interference Lithography," Technical Digest Eighth Intern. Vacuum Microelectronics Conf., Portland, Oreg., p. 103, 1995. PA1 (4) J. E. Pogemiller, H. H. Busta and B. J. Zimmerman, "Gated Chromium Volcano Emitters," J. Vac. Sci. Technology B 12 (2), p. 680, 1993. PA1 (5) Busta, et al., "Volcano-shaped Field Emitters for Large Area Displays," IEDM 95 Technical Digest, (The International Electron Devices Meeting), pp. 405-408.
To form these cone arrays, typical photolithographic processing tools as they are used in the manufacture of integrated circuits on eight inch diameter wafers, are employed. Such processing tools include UV light optical steppers and electron beam exposure systems. For arrays that can be fabricated on eight inch diameter substrates, these tools are perfectly adequate. However, for FEDs having principal dimensions of 12" to 20" and larger, adequate photolithographic tools do not yet exist for exposing these small (micron and submicron) gate diameters. See in this regard:
Fortunately, different field emitter structures exist in which the small spacing between the extraction gate and the emitter is obtained by a thin film deposition step and not by lithography. These devices are typically referred to as volcano-shaped field emitters or as vertical (thin film) edge emitters. A production technique has been proposed wherein these devices are employed to fabricate arrays using printed wiring board-type lithography. See the following publication:
Typical examples and emission results of single gated devices are discussed in the following publication, which is incorporated herein by reference:
By adding one insulating layer and a metallic layer to the single gated structure, a dual gated structure can be constructed which may exhibit lowered gate current. However, as is apparent, fabrication of such an arrangement becomes more complicated. Such a device is disclosed by Gray and Hsu in U.S. Pat. No. 5,382,185, entitled "Thin-Film Edge Field Emitter Device and Method of Manufacture Therefor," issued Jan. 17, 1995.
Investigators of practical field emitter displays and other cold emission sources have encountered and continue to encounter a variety of technical challenges. As noted above, practicality necessitates fabrication of larger arrays at reasonable cost. The performance capabilities of the field emitter devices should be in consonance with available and practical driver circuitry. This calls for gate-to-emitter structures exhibiting lower capacitance levels adequate to achieve practical turn-on voltages. The physical integrity of the devices also must be assured to achieve stable performance. In this regard, electrode spacing dielectric components must be configured having an extent or thickness sufficient to avoid pinhole phenomena and the like. In contrast, effective device performance calls for closer gate-to-electrode spacing with consequently evolved higher capacitance. Higher capacitance calls for more elaborate and more expensive driver circuits or higher current drive schemes. In further contrast, closer gate-to-electrode spacing serves to reduce required turn-on voltage.